Home Syllabus Digital Logic Systems

# Digital Logic Systems

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## Course Objectives:

This course aims to develop methods of designing, constructing and building logic circuits and also to introduce the operation and application of the microprocessor. Topics will include basic gates, number system, flip-flops, decoder, encoder, and ALU.

## Course Contents:

###### Unit I: Number System ———————————————————- 6 hours
1. Introduction to number systems (Decimal, Binary, Octal, and Hexadecimal)
2. Conversions
3. Complements subtraction using 1’s complement
4. 2’s complement
5. 9’s complement
6. 10’s complement
7. Application of the complements (1’s and 2’s) BCD code
8. Error detection codes
9. Alphanumeric codes
10. Excess – 3 code
11. Gray code
###### Unit II: Boolean Algebra and Logic Gates ——————————— 6 hours
1. Introduction to Digital System
2. Basic theorem and properties of Boolean Algebra:
1. Identity law
2. Boundedness law
3. Idempotent law
4. Complement law
5. Commutative law
6. Distributive law
7. Absorption law
8. Associative law
9. De-Morgan’s law
10. Involution law
3. Boolean functions
1. The complement of Boolean function
2. Digital logic gates and truth tables (AND, OR, NOT, NAND, NOR, XOR, XNOR)
3. Canonical and standard forms
4. Minterms and maxterms
1. Sum of minterms
2. Product of maxterms
###### Unit III: Simplification of Boolean Functions —————————– 6 hours
1. The Karnaughmap – 2, 3 and 4 variables
2. Simplification and realization using NAND & NOR gates
3. Practical design steps
###### Unit IV: Combinational Logic with MSI and LSI ————————– 8 hours
1. Introduction
2. Design procedures
4. Subtractors
5. Code conversion:
1. BCD to excess- 3
2. 8, 4,-2,-1 code to BCD
3. 2, 4, 2, 1 code to 8, 4, -2, -1 code
6. Decoder
7. Encoder
8. Multiplexers and Demultiplexers
9. BCD to seven segment decoder
10. ROM and its implementation
11. PLA
###### Unit V: Sequential Logic ——————————————————- 10 hours
1. Introduction
2. Flip-Flops:
1. RS flip flop
2. D-flip flop
3. J-K flip flop
4. T flip-flop
5. Triggering of flip flops (Positive, negative and level trigger)
6. Master- Slave flip-flop,
3. Analysis of clocked sequential
4. Circuits with example
5. State table
6. State diagram
7. State Equation
8. Flip-flop input functions
9. State reduction and assignment
10. Flip-Flips excitation Tables and design procedures.
###### Unit VI: Registers and Counters ——————————————— 6 hours
1. Introduction
2. Shift Registers:
1. Serial in Serial out
2. Serial in Parallel out
3. Parallel in parallel out
4. Parallel in Serial out
3. Ripple counters:
1. Binary ripple counter
2. BCD ripple counter
3. Synchronous UP/Down counters,
4. Timing Sequences
###### Unit VII: Processor Logic Design ——————————————– 6 hours
1. Introduction
2. Processor Organization
3. Bus organization
5. Accumulator Register
6. Arithmetic Logic Unit (ALU)
7. Design of arithmetic circuit
8. Design of logic circuit

## Laboratory:

1. Verification of basic gates function: OR, AND, NAND, NOR, EX-OR, EX_NOR)
2. Multiplexers and demultiplexers (using the Principle learned in K-Map)
3. Encoders and decoders (using the principle learned in K-Map)
4. Adder and subtractions, in these laboratory students, will construct a full adder and subtractor using basic design principle.
5. RS, D-Type, clocked D and master-slave. In this laboratory, students will design and verify the concepts of different flip-flops based on basic logic gates.
6. Design of counters (decade counters and binary counters). Students will design decade and binary counters verify the concepts using the CAD tools.
7. Design of shit registers (serial in serial out and parallel in parallel out)

## Reference Books:

1. Malvino: Digital Computer Electronics
2. Morris Mano: Digital Logic and Computer Design
3. Frederic J. Mowle: A systematic approach to digital logic design