Course Objectives:
This course aims to develop methods of designing, constructing and building logic circuits and also to introduce the operation and application of the microprocessor. Topics will include basic gates, number system, flipflops, decoder, encoder, and ALU.
Course Contents:
Unit I: Number System ——————————————————— 6 hours

 Introduction to number systems (Decimal, Binary, Octal, and Hexadecimal)
 Conversions
 Complements subtraction using 1’s complement
 2’s complement
 9’s complement
 10’s complement
 Application of the complements (1’s and 2’s) BCD code
 Error detection codes
 Alphanumeric codes
 Excess – 3 code
 Gray code
Unit II: Boolean Algebra and Logic Gates ——————————— 6 hours

 Introduction to Digital System
 Basic theorem and properties of Boolean Algebra:
 Identity law
 Boundedness law
 Idempotent law
 Complement law
 Commutative law
 Distributive law
 Absorption law
 Associative law
 DeMorgan’s law
 Involution law
 Boolean functions
 The complement of Boolean function
 Digital logic gates and truth tables (AND, OR, NOT, NAND, NOR, XOR, XNOR)
 Canonical and standard forms
 Minterms and maxterms
 Sum of minterms
 Product of maxterms
Unit III: Simplification of Boolean Functions —————————– 6 hours

 The Karnaughmap – 2, 3 and 4 variables
 Simplification and realization using NAND & NOR gates
 Practical design steps
Unit IV: Combinational Logic with MSI and LSI ————————– 8 hours

 Introduction
 Design procedures
 Half and full adders
 Subtractors
 Code conversion:
 BCD to excess 3
 8, 4,2,1 code to BCD
 2, 4, 2, 1 code to 8, 4, 2, 1 code
 Decoder
 Encoder
 Multiplexers and Demultiplexers
 BCD to seven segment decoder
 ROM and its implementation
 PLA
Unit V: Sequential Logic —————————————————— 10 hours

 Introduction
 FlipFlops:
 RS flip flop
 Dflip flop
 JK flip flop
 T flipflop
 Triggering of flip flops (Positive, negative and level trigger)
 Master Slave flipflop,
 Analysis of clocked sequential
 Circuits with example
 State table
 State diagram
 State Equation
 Flipflop input functions
 State reduction and assignment
 FlipFlips excitation Tables and design procedures.
Unit VI: Registers and Counters ——————————————— 6 hours

 Introduction
 Shift Registers:
 Serial in Serial out
 Serial in Parallel out
 Parallel in parallel out
 Parallel in Serial out
 Ripple counters:
 Binary ripple counter
 BCD ripple counter
 Synchronous UP/Down counters,
 Timing Sequences
Unit VII: Processor Logic Design ——————————————– 6 hours

 Introduction
 Processor Organization
 Bus organization
 Scratchpad memory
 Accumulator Register
 Arithmetic Logic Unit (ALU)
 Design of arithmetic circuit
 Design of logic circuit
Laboratory:

 Verification of basic gates function: OR, AND, NAND, NOR, EXOR, EX_NOR)
 Multiplexers and demultiplexers (using the Principle learned in KMap)
 Encoders and decoders (using the principle learned in KMap)
 Adder and subtractions, in these laboratory students, will construct a full adder and subtractor using basic design principle.
 RS, DType, clocked D and masterslave. In this laboratory, students will design and verify the concepts of different flipflops based on basic logic gates.
 Design of counters (decade counters and binary counters). Students will design decade and binary counters verify the concepts using the CAD tools.
 Design of shit registers (serial in serial out and parallel in parallel out)
Reference Books:

 Malvino: Digital Computer Electronics
 Morris Mano: Digital Logic and Computer Design
 Frederic J. Mowle: A systematic approach to digital logic design